About Me
Hi, I’m Yen-Hsiang Huang, a first-year Ph.D. student supervised by Prof. Sung Kyu Lim at Georgia Tech Computer-aided Design Lab(GTCAD). My research interests are in 3D VLSI, and I’m currently working on topics related to bumps and pads legalization for 3D ICs.
I completed my undergraduate studies at National Taiwan University in 2022, where I achieved 4.06/4.30. During my undergraduate years, I had the privilege of interning at Synopsys (2021 summer) and Cadence (2020 summer), where I worked on improving the state-of-art EDA tools.
Prof. Lim’s lab has provided me with an excellent opportunity to explore my research interests and gain valuable experience in the field of 3D VLSI. To learn more about the lab and its ongoing research projects, please visit GTCAD.
Publication
- On Legalization of Die Bonding Bumps and Pads for 3D ICs(Invited)
Sai Pentapati, Anthony Agnesina, Moritz Brunion, Yen-Hsiang Huang, Sung Kyu Lim.
27th ACM International Symposium on Physical Design (ISPD), 2023.
Education
National Taiwan University
B.S. in Electrical Engineering
2017 - 2022
- GPA: 4.06/4.30
- TSMC Scholarship for Undergradate Student, Sept. 2020 - Jan. 2021
- The Presidential Award, spring 2020